MCS-012 Solved Assignment 2018-19 For IGNOU BCA 2nd Semester and MCA 1st Semester. This solution is valid for July 2018 and January 2019 Sessions.
Course Code : MCS-012
Course Title : Computer Organisation and Assembly Language Programming
Assignment Number : BCA(2)/012/Assignment/2018-19
Maximum Marks : 100
Weightage : 25%
Last Dates for Submission : 15th October, 2018 (For July, 2018 Session)
15st April, 2019 (For January, 2019 Session)
There are four questions in this assignment, which carries 80 marks. Rest 20 marks are for viva voice. You may use illustrations and diagrams to enhance the explanations. Please go through the guidelines regarding assignments given in the Program Guide for the format of presentation. Answer to each part of the question should be confined to about 300 words. Make suitable assumption, if any.
Question 1 (Covers Block 1)
(a) What are fixed point numbers in a computer system? Why are negative fixed point numbers represented in complement form? Give examples of fixed point numbers (positive as well as negative) assuming the size of the notation to be 8 bits (including sign bit).
Perform the following arithmetic operations using signed 2’s complement 8 bit representation. (Please note that the numbers given below are in decimal notation)
i) Add –30 and –98
ii) Subtract –79 from 45
Please indicate overflow if it is occurs. Explain how have you identified the overflow? (2 Marks)
(b) Perform the following conversion of numbers:
i) Decimal (56789123)10 to binary and hexadecimal
ii) Hexadecimal (ABCDEF0)H into Octal.
iii) ASCII string “Subject: Computer %$ Sc.” into UTF 8 string
iv) Octal (345123)O into Decimal (2 Mark)
(c) Design a circuit for the following function:
F(A, B, C, D) = Σ (2,3,4, 5, 10, 11, 12, 13)
Draw the truth table. Use the Karnaugh’s map to design the circuit and draw it using AND, OR and NOT gates. (4 Marks)
(d) What is the need of a parity bit? Explain with the help of an example. How many parity bits are needed to detect and correct a single bit error in a 8-bit data? Explain the process of correction of Single bit error with the help of an example which is not from your Unit. (4 Marks)
(e) Design a two bit down counter (a sequential circuit). The counter states are 11, 10, 01, 00, 11, 10, 01, 00, 11…You should show the state table, state diagram, the k-map for circuit design and logic diagram of the resultant design using D flipflop or J-K flip flop. (4 Marks)
(f) What is floating point number? What is the difference between Single precision and double precision floating point numbers? What is a representation for Zero in IEEE 754 single precision standard. Represent (-23456.05)10 and (0.00025)10 in IEEE 754 single precision format. (4 Marks)
Question 2 (Covers Block 2)
(a) A RAM has 1M rows each having 16 cells:
(i) How many data input and data output lines does this RAM needs? Explain your answer.
(ii) What is the capacity of RAM in bytes.
(iii) How many address lines are needed for this RAM? Give reason in support of
your answer. (2 Marks)
(b) A computer has 1 MB RAM and has a word size of 16 bits. It has cache memory having 8 blocks having a block size of 32 bits. Show how the main memory address 0001 1001 1110 1101 0001 will be mapped to cache address, if
(i) Direct cache mapping is used
(ii) Associative cache mapping is used
(iii)Two way set associative cache mapping is used. (4 Marks)
(c) What is the need of DMA in a Computer? How is DMA different than that of Interrupt driven I/O technique? Assume that a new computer supports few bytes of input from multiple user’s, which of the three I/O techniques is most suitable for this computer? Justify your answer. (4 Marks)
(d) Assume that a disk has 1000 tracks with each track having 64 sectors and each sector is of size 512 K. A file having the name bcamca.txt is of size 16 M. Assume that disk has four free continuous clusters of 8 sectors each. How can this file be given the space on the disk? Also show the content of FAT after the space allocation to this file. You may make suitable assumptions. You may assume the cluster size as 2 sectors, if needed. (4 Marks)
(e) Explain the following giving their uses and advantages/disadvantages.
(Word limit for answer of each part is 50 words ONLY) (6 Marks)
(i) Memory Interleaving
(iii) IDE interface
(iv) CAV and CLV in the context of disks
(v) Passive and Active matrix display
(vi) Advantages and disadvantages of Ink-jet printers
Question 3 (Covers Block 3)
(a) A computer has a single core processor having 8 General purpose registers and 8 additional special purpose registers. The machine has 64 KB RAM. The size of each register and memory word is 16 bits each. An instruction of the machine is of fixed length and is equal to two memory words. Each instruction of the machine has two operands – one memory operand and second register operand. Memory operand uses direct addressing; however, register operand can use either register direct or register indirect addressing. (Please note that if register operand uses indirect addressing, then stated register contains the address of the operand in the memory.) An instruction of a machine consists of operation code bits, One addressing mode bit and one register operand and one memory operand.
(b) Assume that you have a machine as shown in section 3.2.2 of Block 3 having the micro-operations as given in Figure 10 on page 62 of Block 3. Consider that R1 and R2 both are 8 bit registers and contains 01111011 and 10000100 respectively. What will be the values of select inputs, carry-in input and result of operation (including carry out bit) if the following micro-operations are performed? (For each micro-operation you may assume the initial value of R1 and R2 as given above) (2 Marks)
(i) Subtract R2 from R1with borrow
(ii) Exclusive OR of R1 and R2
(iii)Shift Left R1 twice
(iv) Increment R1
(c) Explain the structure of Control Unit with the help of block diagram. What is the role of control signals in instruction execution? (3 Marks)
(d) Explain the reasons of reducing complexity in a RISC machine. What are the advantages of using large register file in RISC? How RISC machine’s instruction pipelining different from other machine’s instruction pipelining? (2 Marks)
(e) A RISC machine has 128 registers out of which 32 registers are reserved for the Global variables and 32 for Instruction related tasks. This machine has been designed to have 8 registers for storing two input parameters, two output parameters and four local variables for function call. Explain with the help of a diagram, how the overlapped register window can be implemented in this machine for function/procedure calls. You must explain how the parameters will be passed when a function calls another function. How many levels of calls such a machine can support?
Question 4 (Covers Block 4)
(a) Write a program using 8086 assembly Language (with proper comments) that accepts four characters entered using the keyboard. It checks if all these characters are decimal digits. If all of them are decimal digits then program calculates the equivalent hexadecimal value of the four digit number that has been input. The program then displays this hexadecimal number on the screen. Make suitable assumptions, if any. (7 Marks)
(b) Write a program using 8086 assembly Language (with proper comments) that passes AL register value as parameter to a near procedure named DIVZERO, which checks if this passed AL value is zero or not. In case this value is ZERO program is terminated otherwise same value is returned in AL register. Make suitable assumptions, if any. (7 Marks)
(c) Explain the following in the context of 8086 Microprocessor (6 Marks)
(i) The supported memory in 8086 is 1 MB whereas instruction offset is only 16 bits
(ii) Processing of Interrupts using IVT
(iii) Indirect addressing modes of 8086 microprocessor
Please note: Question 3(a) and 3(e) is not answered in this solution.
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